Clock selection for storage elements of integrated circuits

Details Clock selection for storage elements of integrated circuits Clock selection for storage elements of integrated circuits

1991-09-06

1992-10-13

Westin, Edward P.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

301269, 301465, H03K 1900, H03K 513

Patent

active

051553937

ABSTRACT:
A clock circuit having a logic gate with an output supplying a clock signal to a clock input of a storage element and with plural inputs, including an input connected to an external contact for receiving an external clock signal and an input connected to a logic circuit to receive a logic term, such as a product term or sum-of-products term. The logic gate logically combines the internally generated logic with the external clock signal to produce the clock signal for the storage element. The logic gate may be an AND, OR, NAND or NOR gate. A multiplexer with an output connected to an input of the logic gate and responsive to a control signal may select one of two or more logic terms, one of two or more external clock signals, or a fixed voltage signal.

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