Clock selection circuit for selecting one of a plurality of cloc

Details Clock selection circuit for selecting one of a plurality of cloc Clock selection circuit for selecting one of a plurality of cloc

1988-12-12

1990-11-13

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307480, 328 63, 328 72, H03K 513, H03K 1902, H03K 700, H03K 1700

Patent

active

049704052

ABSTRACT:
A clock selection circuit for selecting and outputting one of several clock pulse signals supplied thereto includes a selector supplied with the clock pulse signals and with selection signals each corresponding to the clock pulse signals and selecting one of the clock pulse signals when a corresponding selection signal takes a selection level. A control circuit is supplied with selection data for producing the selection signals, one of which takes the selection level in response to the selection data. The control circuit responds to the change of the selection data for changing one of the selection signals from the selection level to the non-selection level without a substantial delay and another selection signal from the non-selection level to the selection level after a delay of at least one clock pulse of the clock pulse signal to be selected.

REFERENCES:
patent: 4713621 (1987-12-01), Nakamura et al.
patent: 4796095 (1989-01-01), Shimada

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