Clock scheme for VLSI systems

Details Clock scheme for VLSI systems Clock scheme for VLSI systems

1987-05-20

1988-08-02

Heyman, John S.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307475, 307303, 307470, 307480, 328 60, 328 63, H03K 366, H03K 515

Patent

active

047615672

ABSTRACT:
An integrated circuit includes an input clock generator circuit responsive to an external TTL level clock signal for generating an internal CMOS level system clock signal for its own use and for use by other integrated circuits. The integrated circuit also includes an internal clock generator circuit responsive to either the internal CMOS level system clock signal or an external CMOS level system clock signal for generating internal CMOS level phase clock signals for its own use. As a result, the integrated circuit has a higher speed of operation since the propagation delay between the CMOS level system clock signal and internal clock signals has been minimized.

REFERENCES:
patent: 4409671 (1983-10-01), Daniels et al.
patent: 4527079 (1985-07-01), Thompson
patent: 4578601 (1986-03-01), McAlister et al.
patent: 4683384 (1987-07-01), Shibata et al.
patent: 4691124 (1987-09-01), Ledzius et al.
patent: 4691126 (1987-09-01), Splett et al.
patent: 4697095 (1987-09-01), Fijii
Zem et al.-"GTI-742 Camac Clock Pulse Generator", Instrum. and Exp. Tech (U.S.A.), vol. 20, No. 3, Nov. 1977, pp. 699-701.

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