Clock resynchronization mechanism

Details Clock resynchronization mechanism Clock resynchronization mechanism

1989-01-23

1990-04-10

Safourek, Benedict V.

Pulse or digital communications

Spread spectrum

Direct sequence

375118, H04L 702

Patent

active

049167170

ABSTRACT:
Disclosed is an arrangement having a main card cage, a plurality of remote card cages, and a data transport system for transmitting synchronous information, the data transport system having at least one bust electrically coupling the card cages to define a plurality of data lines between the main card cage and each of the remote card cages, a master clock generator at the main card cage for generating a single master clock, and a clock resynchronizer at the main card cage for resynchronizing with the master clock data messages received from the remote card cages which have the same frequency, but are shifted in phase from the master clock.

REFERENCES:
patent: 4187394 (1980-02-01), Sievers
patent: 4189622 (1980-02-01), Foshee
patent: 4554673 (1985-11-01), Stevens
Dogan A. Tugal and Osman Tugal, "Data Transmission Analysis, Design, Applications", copyrighted 1982 by McGraw Hill, Inc., pp. 168-173.
Duncan A. Jellichamp, "Real-Time Computing With Applications to Data Acquisition and Control", by Van Nostrand Reinhold Company, pp. 222-227.
"Data Communications Handbook 1985" by the staff of Signetics Corporation Microprocessor Division, pp. 25-28.

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