Clock regulation apparatus and circuit arrangement

Details Clock regulation apparatus and circuit arrangement Clock regulation apparatus and circuit arrangement

2007-07-17

2007-07-17

Wells, Kenneth B. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Clock or pulse waveform generating

C327S027000, C327S037000, C327S298000, C327S299000

Reexamination Certificate

active

10989600

ABSTRACT:
Clock regulation apparatus for preventing a logic switching mechanism from operating incorrectly. The apparatus has a supply voltage input that receives a supply voltage, which is also applied to the logic switching mechanism, a comparison unit that outputs an error signal if the supply voltage value drops below a reference value, a clock signal input that receives a clock signal from a clock generator, and a clock suppression unit, which is coupled to the clock signal input and to the comparison unit, that has a clock output for outputting the clock signal and that suppresses or delays the clock signal for a duration of at least one clock period if the error signal exists.

REFERENCES:
patent: 5192914 (1993-03-01), Sudo et al.
patent: 6675301 (2004-01-01), Kurosawa
patent: 6686782 (2004-02-01), Kinoshita et al.
patent: 695 22 595 (2002-07-01), None
patent: 7-264874 (1995-10-01), None
patent: 2001-125690 (2001-05-01), None
patent: WO-00/26747 (2000-05-01), None

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