Clock recovery mechanism

Details Clock recovery mechanism Clock recovery mechanism

2005-12-06

2005-12-06

Ha, Dac V. (Department: 2634)

Pulse or digital communications

Synchronizers

Frequency or phase control using synchronizing signal

C370S503000

Reexamination Certificate

active

06973148

ABSTRACT:
A frequency estimate of an incoming data input is generated and transmitted with network traffic to a receiver. At the receiver, the estimate is recovered, decoded, and is used to seed an algorithm for locking the data access rate of the receiver to the incoming data. Data is buffered in buffers at each end of the system, and data flow out of the buffers is managed depending upon data rate.

REFERENCES:
patent: 5400370 (1995-03-01), Guo
patent: 5850422 (1998-12-01), Chen
patent: 5963608 (1999-10-01), Casper et al.
patent: 6044123 (2000-03-01), Takla
patent: 6072810 (2000-06-01), Van der Putten et al.

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