Clock recovery apparatus

Pulse or digital communications – Synchronizers

Reexamination Certificate

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Details

C375S373000, C375S376000, C327S141000, C327S147000, C327S156000, C455S260000

Reexamination Certificate

active

07965800

ABSTRACT:
A clock recovery apparatus for generating a recovery clock from received data may include, but is not limited to, first and second oscillators. The first oscillator generates a first signal having a first frequency. The first signal synchronizes with the received data when the received data has a first level. The second oscillator is connected in series to the first oscillator. The second oscillator generates a second signal as the recovery clock when the first signal has a second level. The second signal has a second frequency. The second signal synchronizes with the first signal.

REFERENCES:
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patent: 6018273 (2000-01-01), Tsyrganovich
patent: 6208183 (2001-03-01), Li et al.
patent: 6259326 (2001-07-01), Dunlop et al.
patent: 7522686 (2009-04-01), Nam et al.
patent: 7667544 (2010-02-01), Sugawara et al.
patent: 7734000 (2010-06-01), Kuo et al.
patent: 08213979 (1996-08-01), None
Yusuke Ota et al., “High-Speed, Burst-Mode, Packet-Capable Optical Receiver and Instantaneous Clock Recovery for Optical Bus Operation”, Journal of Lightwave Technology, Feb. 2004, pp. 325-331, vol. 12, No. 2.
Yusuke Ota et al., “High-Speed, Burst Mode, Packet-Capable Optical Receiver and Instantaneous Clock Recovery for Optical Bus Operation”, Journal of Lightwave Technology, Feb. 1994, pp. 325-331, vol. 12, No. 2.

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