Clock recovery

Details Clock recovery Clock recovery

2005-06-13

2009-08-25

Fan, Chieh M. (Department: 2611)

Pulse or digital communications

Synchronizers

Synchronizing the sampling time of digital data

C702S189000, C702S182000, C702S190000

Reexamination Certificate

active

07580492

ABSTRACT:
Clock recovery apparatus having an early/late voter for deciding whether a current sampling point needs to be advanced or retarded, wherein the early/late voter passes and Up/Down signal to an interpolator for maintaining a clock signal; a frequency accumulator and rate multiplier30for generating further signals which are summed with those of the Up/Down signal of the early/late voter to provide an improved control signal to the phase interpolator. The accumulator is responsive to frequency changes in the input signal, and the interpolator acts on said Up/Down signals to adjust the clock signal by stepping it forward or backward according to control need, so that the sampling point can be advanced or retarded.

REFERENCES:
patent: 7302365 (2007-11-01), Forey et al.
patent: 2003/0086339 (2003-05-01), Dally et al.
patent: 2004/0028164 (2004-02-01), Jiang et al.

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