Clock rate recovery circuit

Pulse or digital communications – Repeaters – Testing

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Details

375 58, 375118, H04B 110, H03K 902

Patent

active

042754658

ABSTRACT:
There is a need to recover the clock rate from a received and demodulated binary data signal in order to properly decode the received data. Unfortunately some linear modulation systems used for transmission have the effect of ensuring that there is substantially no frequency component in the received signal at the desired clock rate. Non-linear processing of the received signal (e.g. by a rectifier circuit) is therefore necessary to recover the clock. A simple rectifier circuit system is sensitive to the phase difference between the transmitter and receiver carrier waves. The present recovery circuit (10) requires a quadrature demodulator (9) to provide in-phase and quadrature versions x.sub.1 (t) and x.sub.2 (t) of the received demodulated data signal. Two parallel chains of rectifier circuit (30,31), on/off limiter (32,33), multiplier (34,35) and low pass filter (36,37) act separately on the said versions. Whatever the carrier phase difference, one or other of the chains gives an adequate control signal for a VCO (39). These control signals are summed at (38).

REFERENCES:
patent: 3993956 (1976-11-01), Gilmore et al.
patent: 4105975 (1978-08-01), Sanders et al.
patent: 4137427 (1979-01-01), Choquet et al.

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