Clock pulse tolerance verification circuit

Details Clock pulse tolerance verification circuit Clock pulse tolerance verification circuit

1980-12-29

1982-12-07

Heyman, John S.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307480, 328163, 371 25, 371 61, H03K 1332

Patent

active

043629571

ABSTRACT:
A circuit arrangement for comparing a clock pulse train against a standard pulse train. The circuit includes an exclusive OR gate to which are inputted the pulse train to be tested, and a latch at the output of the gate, operated only upon a mismatch of the two pulse trains. Provision is also made to prevent operation of the latch within certain adjustable tolerance parameters as to pulse width and position of the pulse train.

REFERENCES:
patent: 2980858 (1961-04-01), Grondin et al.
patent: 3237157 (1966-02-01), Higby
patent: 3723868 (1973-03-01), Foster
patent: 4122995 (1978-10-01), Franke

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