Clock pulse regenerator

Details Clock pulse regenerator Clock pulse regenerator

1978-12-13

1980-10-07

Safourek, Benedict V.

Pulse or digital communications

Spread spectrum

Direct sequence

328164, 375 4, 375104, H04L 2566

Patent

active

042272513

ABSTRACT:
A clock pulse regenerator is constructed with digital circuits and may be built using large scale integration techniques. An oscillator produces first pulses at a repetition rate higher than that of the incoming digital data signal. A first counter counts the first pulses to produce the regenerated clock pulses. A gate pulse generator is responsive to both the incoming digital data signal and the regenerated clock pulses to generate a gate pulse having a pulse width proportional to a phase difference between the two signals. A third counter counts the number of leading and trailing edges of the incoming digital data signal. The pulse outputs of the second and third counters are supplied to a gate circuit. A fourth counter counts the pulses transmitted by the gate circuit to produce, after a predetermined count, a reset pulse for the first, second, third and fourth counters. The second, third and fourth counters therefore serve as a phase detector. The detection output resets the first counter which generates the clock pulse sequence with the received input.

REFERENCES:
patent: 3781696 (1973-12-01), Loon
patent: 4064361 (1977-12-01), Kustka
patent: 4087627 (1978-05-01), Sato et al.
patent: 4160951 (1979-07-01), Thyselius

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