Clock pulse generating circuit

Details Clock pulse generating circuit Clock pulse generating circuit

1983-10-20

1985-09-17

Anagnos, Larry N.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

377 79, 377 81, 377 76, H03K 515, G11C 1918, G11C 1928

Patent

active

045423016

ABSTRACT:
A clock pulse generating circuit comprises a plurality of circuit blocks connected in series successively to form a multistage configuration, each of alternate ones of which at the odd stages is composed of a first switching element being supplied with a first timing signal, first capacitive element coupled in series with the first switching element and an a NOR gate circuit to which a voltage obtained at the connecting point between the first switching element and the first capacitive element and the first timing signal are supplied, and each of another alternate ones of which at the even stages is composed of a second switching element supplied with a second timing signal, a second capacitive element coupled in series with the second switching element and an inverter to which a voltage obtained at the connecting point between the second switching element and the second capacitive element. The first one of the circuit blocks is supplied with a starting signal and the alternate circuit blocks at the odd stages are used for delivering output pulses therefrom.

REFERENCES:
patent: 3395292 (1968-07-01), Bogert
patent: 3576447 (1971-04-01), McKenny
patent: 4034301 (1977-07-01), Kashio
patent: 4295055 (1981-10-01), Takemoto et al.

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