Clock phase detecting circuit

Details Clock phase detecting circuit Clock phase detecting circuit

1997-03-28

2000-02-22

Le, Amanda T.

Pulse or digital communications

Synchronizers

Synchronizing the sampling time of digital data

375373, 327 2, 331 17, H04L 700

Patent

active

060289023

ABSTRACT:
A clock phase detecting circuit is provided which is arranged in a receiving section of a multiplex radio apparatus. Difference detecting unit detects the difference between input and output signals to and from an equalizing circuit, and squaring unit squares the detected difference. The squared value thus obtained shows a minimum value when the phase of a clock signal output from a clock regenerating circuit coincides with a normal position of signal point. Therefore, phase adjusting unit outputs a control signal to the clock regenerating circuit while monitoring the squared value, to adjust the phase of the clock signal output from the clock regenerating circuit so that the squared value output from the squaring unit may be minimized.

REFERENCES:
patent: 5537419 (1996-07-01), Parr et al.
patent: 5703905 (1997-12-01), Langberg
patent: 5862191 (1999-01-01), Moridi

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