Clock network

Details Clock network Clock network

2000-12-12

2008-12-16

Tra, Quan (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Clock or pulse waveform generating

C327S276000

Reexamination Certificate

active

07466180

ABSTRACT:
A clock network comprises a clock distribution path coupled to a circuit. The clock distribution path and the circuit are formed on a substrate. The clock distribution path comprises a plurality of interconnected elements and one or more disconnected elements. The disconnected elements can be connected to the plurality of interconnected elements after the clock distribution path is tested in connection with the circuit. In one embodiment, the disconnected elements include a capacitor, an interconnect, and a buffer. In an alternative embodiment, the plurality of interconnected elements include a buffer, an interconnect and a capacitor.

REFERENCES:
patent: 5367957 (1994-11-01), Hennessey
patent: 5726585 (1998-03-01), Kim
patent: 5732015 (1998-03-01), Kazerounian et al.
patent: 5740067 (1998-04-01), Hathaway
patent: 5852379 (1998-12-01), Jiang
patent: 5970367 (1999-10-01), Wanlass
patent: 6163194 (2000-12-01), Truong et al.
patent: 6269280 (2001-07-01), Miyanishi et al.
patent: 6410984 (2002-06-01), Trivedi et al.
patent: 6420921 (2002-07-01), Okayasu et al.
patent: 6441665 (2002-08-01), Hashidate et al.
patent: 6492735 (2002-12-01), Matsubara
patent: 63190355 (1988-08-01), None
patent: 08032421 (1996-02-01), None

Affiliated with

Also associated with

Rating

Clock network does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Clock network, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Clock network will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4046555