Clock multiplier circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Frequency or repetition rate conversion or control

Reexamination Certificate

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Details

C327S116000, C327S119000, C377S047000

Reexamination Certificate

active

06876236

ABSTRACT:
A clock multiplier circuit which generates a multiple clock having a stable frequency from a reference clock without using analog devices. The clock multiplier circuit includes ring oscillator which oscillates at a higher frequency than that of the multiple clock; a reference clock counter for counting the sampling output of the reference clock by the output clock of the ring oscillator to obtain a count value of the half cycle of the reference clock; and a multiple clock counter which, in case the value obtained by dividing the count value of the half cycle of the obtained reference clock by the multiplication factor externally given is defined as a multiple count value, inverts the multiple clock output each time it counts the multiple count value by the output clock of the ring oscillator.

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patent: 6-188898 (1994-07-01), None

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