Clock multiplication circuit

Details Clock multiplication circuit Clock multiplication circuit

2007-09-18

2007-09-18

Lam, Tuan T. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Frequency or repetition rate conversion or control

C327S119000, C327S120000, C327S121000, C327S122000, C327S156000, C375S373000, C375S374000, C375S375000, C375S376000, C377S047000, C377S048000

Reexamination Certificate

active

10606226

ABSTRACT:
A clock multiplication circuit simple in configuration, easy to adjust the characteristics thereof, and capable of shortening lockup time. The circuit delivers an output clock signal at a frequency that is a multiple of the frequency of a reference clock signal as inputted. A counter counts the number of rising edges of the output clock signal existing during a High level period of the reference clock signal, delivering a count value CN. A subtracter subtracts the count value from a reference value BN, delivering a difference value DN. An adder adds the difference value to a preceding integrated value, calculating a new integrated value. A DA converter delivers the analog control voltage corresponding to the integrated value. A VCO delivers the output clock signal at a frequency corresponding to the analog control voltage. The frequency of the output clock signal is controlled such that DN=BN−CN=0.

REFERENCES:
patent: 4017719 (1977-04-01), Kaplan et al.
patent: 5317283 (1994-05-01), Korhonen
patent: 5982208 (1999-11-01), Kokubo et al.

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