Clock jitter measurement circuit and integrated circuit...

Details Clock jitter measurement circuit and integrated circuit... Clock jitter measurement circuit and integrated circuit...

2011-05-17

2011-05-17

Bui, Bryan (Department: 2857)

Data processing: measuring, calibrating, or testing

Measurement system in a specific environment

Electrical signal parameter measurement system

C702S079000

Reexamination Certificate

active

07945404

ABSTRACT:
Provided is a measurement circuit for measuring a jitter of a clock signal. Delay elements delay the clock signal into delayed clock signal. Latches latch the delayed clock signals to indicate whether transition edges of the clock signal is within a window value which is corresponding to delays of the delay elements. Based on the latch result from the latches, a finite state machine generates control signals for controlling the delay elements. If the latch result indicates that the transition edges of the clock signal is not within the window value, the control signals adjust the delays of the delay elements and the window value. The jitter of the clock signal is measured based on the delays of the delay elements and the window value.

REFERENCES:
patent: 5663991 (1997-09-01), Kelkar et al.
patent: 6185510 (2001-02-01), Inoue
patent: 7308372 (2007-12-01), Rifani et al.
patent: 7603602 (2009-10-01), Chang

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