Clock generator which generates a non-overlap clock having fixed

Details Clock generator which generates a non-overlap clock having fixed Clock generator which generates a non-overlap clock having fixed

1988-05-03

1989-10-31

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307511, 307480, 307409, 307262, 307601, 307602, 307606, 328 55, 328 63, 328 72, 328155, H03K 513, H03K 700, H03K 1780, H03K 500

Patent

active

048779741

ABSTRACT:
A clock generator which is cascade connected a plurality of single-phase pulse generator circuits including RS flip-flops and delay circuits for defining the pulse width of one output at the RS flip-flop through gates controlling propagation of the other output of the RS flip-flop, so that the final clock frequency is variable by switching control of each gate, whereby a pulse width of each single-phase clock is defined by a delay duration of a delay circuit, thereby not depending on wave forms of the external clock and also the gates connected between the respective single-phase pulse generating circuits are switching-controlled to enable the frequency of the output clock to be variable.

REFERENCES:
patent: 3448295 (1969-06-01), Wanlass
patent: 3961269 (1976-06-01), Alvarez, Jr.
patent: 4386323 (1983-05-01), Jansen
patent: 4463440 (1984-07-01), Nishiura et al.
patent: 4554465 (1985-11-01), Koike
patent: 4654599 (1987-03-01), Zbinden et al.
patent: 4675612 (1987-06-01), Adams et al.
patent: 4713621 (1987-12-01), Nakamura et al.
patent: 4719365 (1988-01-01), Misono
patent: 4758737 (1988-07-01), Hirano
"Handbook of Microcircuit Design and Application" David F. Stout, McGraw Hill, Chap. 9, pp. 9-3, 98-4.

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