Clock generator producing clock signal quickly adjusted to...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Clock or pulse waveform generating

Reexamination Certificate

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Details

C327S105000, C331S057000, C331S00100A

Reexamination Certificate

active

06329860

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to a clock generator and, more particularly, to a clock generator producing a clock signal self-adjustable to a target frequency.
DESCRIPTION OF THE RELATED ART
A voice recording/reproducing apparatus records voice as follows. An audio signal representative of the voice is sampled at a sampling frequency, and the discrete values are respectively converted to digital audio data codes. The digital audio data codes are compressed through ADPCM (Adaptive Differential Pulse Code Modulation), and the compressed data codes are stored in a non-volatile memory. When the voice is reproduced, the compressed data codes are sequentially read out from the non-volatile memory, and are decoded to the digital audio data codes. The decoded audio data codes are converted to an audio signal at the sampling frequency used in the recording. Thus, the prior art voice recording/reproducing apparatus requires a clock signal with the sampling frequency in the voice recording and the voice reproduction. A CR oscillating circuit and a clock generator with a ceramic oscillator are available for the prior art voice recording/reproducing apparatus.
When the manufacturer integrates the electric circuit of the prior art voice recording/reproducing apparatus on a semiconductor chip, some circuit components of the clock generator are prepared as discrete devices, and the discrete devices are connected to the semiconductor integrated circuit device where the other circuit components of the electric circuit are fabricated. If the CR oscillation circuit is used for the prior art voice recording/reproducing apparatus, high-quality resistor elements and high-quality capacitors are required, because the manufacturer needs to exactly tune the CR oscillation circuit at a target frequency. If the clock generator is used, a high-quality ceramic oscillator is required, because the manufacturer also needs to exactly tune the clock generator at a target frequency. The high-quality circuit components are so expensive that the production cost of the prior art clock generator is increased. Thus, the prior art clock generator is an obstacle against reduction of the production cost.
A solution is disclosed in Japanese Patent Publication of Unexamined Application (laid-open) No. 6-45928. The prior art clock generator disclosed therein includes an oscillator associated with a frequency controller. The oscillator has a variable capacitor, and the oscillation frequency is depending on the capacitance of the variable capacitor. The frequency controller has a frequency meter, and the frequency meter measures the current frequency of the oscillation signal. When the oscillating signal is deviated from a target frequency range, the frequency controller changes a control voltage signal applied to the variable capacitor, and makes the oscillating signal fall within the target frequency range.
FIG. 1
shows the circuit configuration of the prior art clock generator. The prior art clock generator includes an oscillator
901
, a first counter
902
, a crystal oscillator
903
, a second counter
904
, an AND gate
905
, a third counter
906
, a register
907
and a digital-to-analog converter
909
. A binary number is stored in the register
907
, and the digital-to-analog converter
909
converts the binary number to a control voltage signal
909
. The control voltage signal is supplied to the oscillator
901
, and the oscillator
901
varies the oscillating signal to a frequency equivalent to the magnitude of the control voltage signal.
While the oscillator
901
is oscillating the oscillation signal, the first counter
902
advances the count with each pulse of the oscillating signal. When the count reaches a predetermined value, the first counter
902
outputs a pulse, resets the count, and supplies a control signal representative of a preset value to the second counter
904
. The second counter
904
advances the count with each pulse of the oscillating signal generated by the crystal oscillator
903
. The oscillation signal of the crystal oscillator
903
is much higher in frequency than the oscillation signal of the oscillator
901
. When the count reaches the present value, the second counter
904
changes the potential level of the output signal thereof. When the first counter
902
is reset, the present value is loaded into the second counter
904
. The output signal of the second counter
904
is ANDed with the output pulse of the first counter
902
. Thus, the AND gate
905
supplies a pulse signal to the third counter
906
, and the third counter
906
advances the count or the binary value with the output pulse signal.
A problem is encountered in the prior art clock generator shown in
FIG. 1
in that a long time period is consumed for a trimming operation. This is because of the fact that the measurement of the frequency is repeated 2
N+1
times until the trimming is completed.
SUMMARY OF THE INVENTION
It is therefore an important object of the present invention to provide a clock generator, in which an oscillating frequency is quickly trimmed.
In accordance with one aspect of the present invention, there is provided a clock generator comprising an oscillating circuit having a parameter and generating an output clock signal variable in frequency depending upon the parameter, a frequency monitor responsive to a basic clock signal so as to measure an actual frequency of the output clock signal and comparing the actual frequency with a target frequency for producing a control signal representative of a result of comparison and a trimming circuit connected between the frequency monitor and the oscillating circuit and responsive to the control signal so as to change the parameter through a binary search.


REFERENCES:
patent: 4613826 (1986-09-01), Masuko et al.
patent: 4617526 (1986-10-01), Hikawa et al.
patent: 5731741 (1998-03-01), Ymamoto et al.
patent: 6204694 (2001-03-01), Sunter
patent: 6-45928 (1994-02-01), None
European search report dated Oct. 4, 2000.

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