Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing
Reexamination Certificate
2003-02-25
2004-07-13
Ton, My-Trang Nu (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Synchronizing
C327S291000
Reexamination Certificate
active
06762635
ABSTRACT:
BACKGROUND OF THE INVENTION
Field of the Invention
The invention relates to a clock generator unit that is used particularly in connection with USB devices. In accordance with the USB specification, a particular accuracy needs to be observed for the data transmission rates. In full speed mode, an accuracy of ±0.25% is required. This accuracy can be achieved only through the clock accuracy; the clock used, therefore, also needs to have this high level of accuracy. However, the USB bus contains no explicit clock line. Each device, therefore, needs to be able to generate the clock itself. If the accuracy for the clock signal is not achieved, then the device is not USB compatible.
Clock signals are normally generated using a circuit on a chip, with an accuracy of ±3% being able to be achieved. To increase the accuracy, it is a known practice to use an additional crystal. Such crystal oscillator circuits are known, by way of example, from “Tietze, Schenk: Halbleiter-Schaltungstechnik [Semiconductor circuitry], Springer Verlag 1999, 11th edition, pages 910 ff.”. In such a case, the crystal module is in the form of an external component. For many applications, however, it is necessary or desirable for all the modules to be on one chip. When using an external crystal, one or two additional pins are required on the chip, which is generally undesirable and generates additional cost. Another problem is the size of a crystal because in chip cards, for example, a thickness of 800 &mgr;m is not meant to or cannot be exceeded. With a crystal, these specifications cannot be observed.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a clock generator, particularly for USB devices, that overcomes the hereinafore-mentioned disadvantages of the heretofore-known devices of this general type and that generates clock signals with a particularly high level of accuracy but, nevertheless, does not require a crystal module.
With the foregoing and other objects in view, there is provided, in accordance with the invention, a clock generator unit for receiving a synchronization signal, including an internal clock generator generating clock pulses as a generated clock signal at an internal clock frequency greater than or equal to a nominal clock frequency of a desired stabilized clock signal, a pulse counter connected to the internal clock generator, the pulse counter to be set to a start value by the synchronization signal, a pulse number memory storing, as an actual value, a number of clock pulses generated between preceding pulses of the synchronization signal, and a pulse filter applying the number of clock pulses stored in the pulse number memory and a given nominal number of clock pulses to ascertain a number of pulses needing to be filtered out of the generated clock signal and filtering the generated clock signal to allow a number of clock pulses corresponding to the nominal clock frequency to be tapped off as the stabilized clock signal.
According to the invention, a clock generator unit has:
an internal clock generator that generates clock pulses at an internal clock frequency that is higher than or equal to the nominal clock frequency of a stabilized clock signal;
a pulse counter that is connected to the internal clock generator and can be set to a start value by a synchronization signal;
a pulse number memory that can store, as an actual value, the number of clock pulses generated between preceding pulses of the synchronization signal; and
a pulse filter that uses the number stored in the pulse number memory and a stipulated nominal number of clock pulses to ascertain the number of pulses that need to be filtered out of the generated clock signal, and that filters the generated clock signal such that a number of clock pulses that corresponds to the nominal number can be tapped off as a stabilized clock signal.
The way in which the inventive clock generator unit works is based on a synchronization pulse being transmitted, in accordance with the USB specifications, at regular intervals, for example, every millisecond in full speed mode, with the frequency of the synchronization signal having a much higher level of accuracy than the required data transmission rate. The fixed interval between the pulses of the synchronization signal and the desired nominal frequency are taken as a basis for stipulating how many clock pulses the clock generator needs to generate between two pulses of the synchronization signal. By comparing the nominal number of pulses with the actual number of pulses between two preceding synchronization pulses, it is known how much the actual clock frequency differs from the nominal clock frequency. By filtering out excess pulses from the internally generated clock signal, the actual clock frequency can be reduced to the necessary nominal clock frequency.
In accordance with another feature of the invention, the pulse number memory stores a number of clock pulses generated between two preceding pulses of the synchronization signal.
In accordance with a further feature of the invention, the pulse number memory stores an average number of clock pulses generated between a plurality of preceding pulses of the synchronization signal.
Not only is the number of pulses between two preceding synchronization signals evaluated, but, also, an average is formed between a plurality of periods. This allows the frequency's range of fluctuation to be reduced further.
One advantage is that the inventive clock generator device is independent of parameters such as technology, temperature, or power consumption. It is, therefore, possible to dispense with expensive measures for observing manufacturing tolerances.
In accordance with the USB specifications, the accuracy of the synchronization signals is higher by a factor of more than five than the accuracy of the stabilized clock frequency required. As a result, a sufficiently large scope for change is left for tuning the components.
In accordance with an added feature of the invention, there is provided a synchronization decoder receiving an input signal, the synchronization decoder being connected to the stabilized clock signal and ascertaining the synchronization signal from the input signal.
In accordance with an additional feature of the invention, the synchronization signal is a synchronization signal provided in accordance with USB specifications.
For the accuracy, it is also advantageous if the stabilized clock signal is an internal stabilized clock signal whose frequency is higher, in an even-numbered ratio, than the nominal clock frequency of an operating clock signal. In such a case, a frequency divider is provided that generates the operating clock signal at the prescribed nominal clock frequency from the internal stabilized clock signal.
A further advantage arises if the pulse memory's value and/or the output signal from a synchronization decoder and/or the output signal from a signal decoder are fed back to the internal clock generator and this allows the frequency of the internal clock generator to be readjusted.
With the objects of the invention in view, there is also provided a clock generator unit for receiving a synchronization signal, including an internal clock generator generating clock pulses as a generated clock signal at an internal clock frequency greater than or equal to a nominal clock frequency of a desired stabilized clock signal, a pulse counter connected to the internal clock generator, the pulse counter to be set to a start value by the synchronization signal, a pulse number memory connected to the pulse counter, the pulse number memory storing, as an actual value, a number of clock pulses generated between preceding pulses of the synchronization signal, and a pulse filter connected to the internal clock generator and to the pulse number memory, the pulse filter applying the number of clock pulses stored in the pulse number memory and a given nominal number of clock pulses to ascertain a number of pulses needing to be filtered out of the generated clock sig
Bruhnke Michael
Preis Viktor
Weder Uwe
Greenberg Laurence A.
Infineon - Technologies AG
Locher Ralph E.
Nu Ton My-Trang
Stemer Werner H.
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