Clock generator for providing non-overlapping clock signals

Details Clock generator for providing non-overlapping clock signals Clock generator for providing non-overlapping clock signals

1984-06-29

1986-11-25

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307269, 307279, 307453, 307481, H03K 505, H03K 515, H03K 526, H03K 1713

Patent

active

046251260

ABSTRACT:
The non-overlap clock circuit of this invention is responsive to a variable input signal for producing a first and second output signal that vary respectively with phases opposite to and the same as the input signal. The circuit comprises a NOR-gate with its first input connected to the variable signal input and its second input to the second signal output of the circuit. The output of the NOR-gate is the first signal output of the circuit. The circuit includes a first means such as an enhancement type FET having a gate and a main current path. The gate is supplied with a first output signal of the circuit and the main current path is connected between ground and the second signal output of the circuit. A second means such as a depletion type FET is also employed with its main current path connected between the variable signal input and the second signal output of the circuit. The second signal output of the circuit is thus driven by the variable input signal through the main current path of the second means. The two output signals provided by the circuit do not overlap and will not simultaneously exceed a predetermined signal level.

REFERENCES:
patent: 3479523 (1969-11-01), Pleshko
patent: 4045685 (1977-08-01), Gehrig
patent: 4179628 (1979-12-01), Ohgishi et al.
patent: 4230951 (1980-10-01), Suzuki et al.
patent: 4296339 (1981-10-01), Murotani
patent: 4317053 (1982-02-01), Shaw et al.
patent: 4456837 (1984-06-01), Schade, Jr.
patent: 4472645 (1984-09-01), White
patent: 4494021 (1985-01-01), Bell et al.
patent: 4547684 (1985-10-01), Pechar
"Schmitt Trigger Prevents Clock Train Overlap" by R. R. Osborn, Electronics, Jul. 3, 1972.
"A Single-Chip Two-Phase Clock" in Electronic Engineering, Dec. 1978.
"Non-Overlapping Clock Generator" by Cases, Moore and Thoma, IBM Technical Disclosure Bulletin, vol. 24, No. 3, Aug. 1981.

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