Clock generator for providing a pair of nonoverlapping clock sig

Details Clock generator for providing a pair of nonoverlapping clock sig Clock generator for providing a pair of nonoverlapping clock sig

1990-05-14

1992-12-22

Sikes, William L.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307265, 307244, 328153, 328105, H03K 3017, H03K 1756, H03K 1700

Patent

active

051736187

ABSTRACT:
A clock generator for producing a pair of nonoverlapping clock signals. In one embodiment, a flip-flop functions as a state machine to clock a pair of complementary switches that direct successive pulses of a clock signal alternately to one and then the other of a pair of output clock signal ports. In another embodiment, each of a pair of output clock signals is generated by an AND gate having a first input connected directly to a clock input and having a second input connected through a delay element. Mechanisms are included to sense the amount of delay introduced by this delay element and to select a new delay value when the sensed delay is outside of an operating range.

REFERENCES:
patent: 4140927 (1979-02-01), Feucht
patent: 4877974 (1989-10-01), Kawai et al.
patent: 4912340 (1990-03-01), Wilcox et al.
Standard Microsystems Corp. Product Information Sheet pp. 293-300 on CRT Video Timer and Controller VTAC.

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