Clock generator for digital demodulators

Details Clock generator for digital demodulators Clock generator for digital demodulators

1985-03-28

1986-12-09

LaRoche, Eugene R.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Afc with logic elements

331 11, 331 25, 307526, 328133, H03L 700

Patent

active

046282823

ABSTRACT:
A clock generator for digital demodulators is disclosed wherein a voltage-controlled oscillator (19) generates clock pulses at controlled frequency and phase in response to error signals from a phase comparator (14) and a frequency comparator (12). The phase error signal represents a phase deviation of the clock from a window pulse which is generated in response to a predetermined transition between binary "1"s and binary "0"s of an input bit stream. The frequency comparator detects the frequency of the clock pulse and compares it with lower and upper limits of a predetermined range of frequency variations and generates a frequency control signal having different voltages depending on the result of the comparison.

REFERENCES:
patent: 3796962 (1974-03-01), Hekimian
patent: 4276512 (1981-06-01), Wittke
patent: 4320527 (1982-03-01), Takasaki
patent: 4375693 (1983-03-01), Kuhn
patent: 4514705 (1985-04-01), Harzer
IBM Technical Disclosure Bulletin, vol. 27, No. 1A, Jun. 1984, pp. 355-357: "Variable Frequency Oscillator Using a Frequency Discriminator", by Rae and Swart.

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