Clock generator circuit

Details Clock generator circuit Clock generator circuit

1981-11-18

1983-11-22

Zazworsky, John

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307262, 328 62, H03K 3037

Patent

active

044171587

ABSTRACT:
A clock generator circuit for generating two pairs of clock signals comprises a NAND circuit and a NOR circuit cross-coupled to each other and each having an input for receiving a reference clock signal (.phi..sub.0). A first inverter is provided between the output of the NAND circuit and the other input of the NOR circuit, and a second inverter is provided between the output of the NOR circuit and the other input of the NAND circuit. A pair of clock signals (.phi..sub.2, .phi..sub.2) are generated from the NAND circuit and the first inverter, while another pair of clock signals (.phi..sub.1, .phi..sub.1) are generated from the NOR circuit and the second inverter.

REFERENCES:
patent: 3311754 (1967-03-01), Linder et al.
patent: 3448295 (1969-06-01), Wanlass

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