Clock generator (buffer) circuit

Details Clock generator (buffer) circuit Clock generator (buffer) circuit

1979-10-09

1982-02-23

La Roche, Eugene R.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307270, 307578, 307DIG4, H03K 326

Patent

active

043170510

ABSTRACT:
A clock generator (buffer) circuit, which consists of an inverter stage, three serially connected field effect transistors, a bootstrap capacitor, a delay element, and two totem pole stages, has good response time and is useful with many of today's static random access memories. The transistors used are enhancement and depletion mode insulated gate field effect transistors.

REFERENCES:
patent: 4061933 (1977-12-01), Schroeder et al.
patent: 4071783 (1978-01-01), Knepper
Cukier, Push-Pull Circuit, IBM Technical Disclosure Bulletin, vol. 18, No. 2, Jul. 1975, pp. 467, 468.

Affiliated with

Also associated with

Rating

Clock generator (buffer) circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Clock generator (buffer) circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Clock generator (buffer) circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1775489