Clock generator and method for generating a clock

Details Clock generator and method for generating a clock Clock generator and method for generating a clock

1995-05-17

1996-08-20

Mis, David

Oscillators

Automatic frequency stabilization using a phase or frequency...

Afc with logic elements

331 2, 331 8, 331 16, 331 17, 331 25, 331173, 327107, 327150, 327159, H03L 708, H03L 716

Patent

active

055482490

ABSTRACT:
The clock generator of this invention includes: an input shutoff control circuit for receiving a base clock and a reference clock and outputting a first signal and a second signal in response to a reset signal, a phase comparator for outputting a phase difference signal indicating a phase difference between the first signal and the second signal; a voltage control oscillator for outputting a frequency variable clock in correspondence with the phase difference signal; and a voltage fixing control circuit for controlling a voltage of the phase difference signal in response to the reset signal, wherein, when the reset signal is in a first level, the input shutoff control circuit: outputs the base clock to the phase comparator as the first signal and outputs the reference clock to the phase comparator as the second signal, and the voltage fixing control circuit holds the voltage of the phase difference signal, and when the reset signal is in a second level different from the first level, the input shutoff control circuit outputs two signals to the phase comparator as the first signal and the second signal, the phase difference between the two signals being substantially zero, and the voltage fixing control circuit fixing the voltage of the phase difference signal to a predetermined voltage at which the voltage control oscillator does not oscillate.

REFERENCES:
patent: 3388339 (1968-06-01), Malnar et al.
patent: 4743864 (1988-05-01), Nakagawa et al.
patent: 4837781 (1989-06-01), Hickling
patent: 5065115 (1991-11-01), Pletz-Kirsch et al.
patent: 5294895 (1994-03-01), Feeney et al.

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