Clock generator and disk drive

Details Clock generator and disk drive Clock generator and disk drive

1998-06-08

2001-05-01

Nguyen, Hoa T. (Department: 2651)

Dynamic magnetic information storage or retrieval

General processing of a digital signal

Data clocking

Reexamination Certificate

active

06226139

ABSTRACT:

TECHNICAL FIELD
The present invention relates to a clock generator and a disk driver adapted advantageously to such devices as a sample servo type magnetic disk drive.
BACKGROUND ART
Sample servo type magnetic disk drives generate a clock signal based on a reproduced signal from clock patterns. The clock signal provides timing information for detecting head position servo information from the surface of a magnetic disk. The clock patterns are contained in servo areas arranged discretely and equal distances apart on concentric recording tracks of the magnetic disk surface.
For a phase-locked loop (PLL) by which to generate the clock signal, the applicant of this invention previously proposed a linear combination type phase comparator (Japanese Patent Laid-Open No. Hei 6-290545) that provides linear combinations of sampled values from clock pattern-reproduced signals as the result of phase comparison.
FIGS. 16A
,
16
B and
16
C sketch the operating principle of the proposed phase comparator.
FIG. 16A
shows a case in which a clock signal lags a clock pattern in terms of phase,
FIG. 16B
depicts a case where the clock pattern and the clock signal match in phase, and
FIG. 16C
indicates a case in which the clock signal leads the clock pattern in phase.
A phase comparison output P
k
is obtained by adding two values. One of the values is acquired by multiplying by a weighting factor C
0
a sampled value S
k−1
of a reproduced isolated waveform from one edge in the clock pattern in effect when the time t=(k−1)T; the other value is obtained by multiplying by a weighting factor C1 a sampled value S
k+1
of the same reproduced isolated waveform in effect when the time t=(k+1)T. Because the reproduced isolated waveform from one clock pattern edge is substantially symmetrical, C
0
=1 and C1=−1.
If a peak of the reproduced isolated waveform coincides with a clock phase and if that peak is present when the time T=kT, then the sampled values S
k−1
and S
k+1
are substantially the same and the phase comparison output P
k
is zero (see FIG.
16
B). If there exists a phase difference, with the peak of the reproduced isolated waveform failing to match the clock phase, then the phase comparison output P
k
is not zero (see FIGS.
16
A and
16
C).
Besides the above two sampled values, more sampled values from the reproduced isolated waveform of the clock pattern may be used to acquire the phase comparison output. For further improvements, this applicant also proposed a maximum likelihood phase comparator (Japanese Patent Laid-Open No. Hei 8-69668) which has weighting factors for linear combinations approximately equalized to sampled values of a differential waveform of a clock pattern-reproduced signal, whereby phase comparison accuracy levels close to theoretical limits are obtained.
Where a reproduced isolated waveform from a clock pattern has a steep gradient, level changes in sampled values with respect to phase changes are pronounced. This minimizes the adverse effects of noise and allows any phase difference to be detected efficiently. On the other hand, a differential waveform of the clock pattern has large amplitude levels where the gradient of the reproduced isolated waveform is steep. This allows the phase comparison output to be acquired with high precision when the weighting factors for linear combinations are made substantially the same as the sampled values of the differential waveform of the clock pattern-reproduced signal.
Illustratively, sampled values Z
k−8
, . . . Z
k
of a reproduced isolated waveform from a clock pattern may be used as shown in FIG.
17
. In this example, sampled values C
0
, . . . , C
8
of a differential waveform of the clock pattern-reproduced signal may be used as weighting factors as depicted in FIG.
18
. Here, an inner product is calculated between two vectors, one having elements (Z
k−8
, . . . , Z
k
) and the other with elements (C
0
, . . . , C
8
). This provides phase comparison outputs at high precision levels.
The sample servo type magnetic disk drive typically has 200 servo areas per disk track. Such an enhanced servo sample frequency allows the disk drive to position its head with high precision. The resulting high track density provides a large storage capacity.
In data recording, however, a prolonged switching time from data recording to servo information reproduction can increase useless areas on the magnetic disk. This tends to worsen the effective use of the medium surface and may offset the benefit of the large storage capacity. For example, suppose that there are 200 servo areas per disk track, that the servo sample frequency is about 15 kHz and that the switching time is 1 to 3 &mgr;s. In that case, between two and five percent of the available magnetic disk surface will become useless areas. The switching time is the time required for the internal circuit states (e.g., magnetic head temperature change and head amplifier status change) to stabilize and thus for the DC level of the reproduced signal waveform to stabilize following each recording/reproduction switchover.
The disadvantage of the reduced use of the medium surface has persisted even with the linear combination type phase comparator or maximum likelihood phase comparator proposed earlier by this applicant to implement precise head position detection by use of a clock signal.
It is therefore an object of the present invention to provide a clock generator and a disk drive whereby DC fluctuations in the signal to be compared in terms of phase are prevented from adversely affecting the result of phase comparison.
DISCLOSURE OF INVENTION
In carrying out the invention and according to one aspect thereof, there is provided a clock generator comprising: clock signal generating means for generating a clock signal; sampling means for sampling a phase comparison target signal which is supplied at predetermined timing intervals and which has a first period, in accordance with the clock signal during every second period shorter than the first period, in order to output N sampled values during the first period, N being a natural number; inner product calculating means for calculating an inner product of a signal vector composed of the N sampled values and a factor vector having N weighting factors, so as to output an outcome of the calculation as a phase comparison signal; and phase control means for controlling the clock signal generating means based on the phase comparison signal so that the phase comparison target signal and the clock signal will match in phase; wherein the total sum of the N sampled factors is substantially zero.
According to another aspect of the invention, there is provided a disk drive for driving a disk type storage medium on which a reference pattern for clock signal generation is recorded predetermined distances apart, the disk drive comprising: access means for reproducing a signal recorded on the disk type storage medium in order to output a reproduced signal; clock signal generating means for generating a clock signal; sampling means for sampling that reproduced signal from the reference pattern which is included in each of predetermined timing intervals and which has a first period, in accordance with the clock signal during a second period shorter than the first period, in order to output N sampled values, N being a natural number; inner product calculating means for calculating an inner product of a signal vector composed of the N sampled values and a factor vector having N weighting factors, so as to output an outcome of the calculation as a phase comparison signal; and phase control means for controlling the clock signal generating means based on the phase comparison signal so that the reproduced signal from the reference pattern and the clock signal will match in phase; wherein the total sum of the N sampled factors for the inner product calculating means is substantially zero.
According to the invention, the phase comparison target signal is sampled in accordanc

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