Clock generation circuits providing slewing of clock frequency

Oscillators – Automatic frequency stabilization using a phase or frequency... – Tuning compensation

Reexamination Certificate

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C331S045000, C331S057000, C331S074000, C331S034000, C375S376000, C327S156000

Reexamination Certificate

active

07061331

ABSTRACT:
Techniques are described for slewing a clock frequency of a clock signal from an initial clock frequency to a final clock frequency. An oscillator provides a number of phase outputs. A current frequency divider value is set to an initial frequency divider value, the initial frequency divider value corresponding to the initial clock frequency. A period of a feedback signal is modified through a number of periods from an initial period to a final period, utilizing one or more of the phase outputs. The current frequency divider value is changed when the period of the feedback signal reaches the final period. The modify and change operations are performed until the current frequency divider value reaches a final frequency divider value, where the final frequency divider value corresponds to the final clock frequency.

REFERENCES:
patent: 6114914 (2000-09-01), Mar
patent: 6356132 (2002-03-01), Mastrocola et al.
patent: 6606005 (2003-08-01), Chang
U.S. Appl. No. 10/644,362, filed Aug. 20, 2003, Paist et al.

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