Clock generation circuit and clock generation method

Details Clock generation circuit and clock generation method Clock generation circuit and clock generation method

2007-10-02

2007-10-02

Nguyen, Linh My (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C327S158000

Reexamination Certificate

active

11312392

ABSTRACT:
A clock generation circuit and a clock generation method are provided, which are spread spectrum clock generation and accurate phase control of a reference clock signal and an output clock signal. An input divider unit70divides an input clock signal CLKR by 50 to output a divided input clock signal CLKS. A DLL circuit80operates to obtain delay control signals DCS1, DCS2. A modulation circuit40modulates, in response to the delay control signals DCS1, DCS2and a modulation signal MOD output from a modulation control circuit50, the divided input clock signal CLKS to output a modulation clock signal CLKN. A phase comparator11detects the phase difference between the modulation clock signal CLKN and a divided inner clock signal CLKM. A clock generation unit20generates an output clock signal CLKO having frequency corresponding to a phase difference signal from the phase comparator11.

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