Clock generation

Details Clock generation Clock generation

1992-08-24

1995-02-14

Dolinar, Andrew M.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Clock or pulse waveform generating

327116, 327258, H03K 5159

Patent

active

053898303

ABSTRACT:
There is described clock generation circuitry comprising: a plurality of sequentially connected delay devices, a first one of which is coupled to receive the first clock signal, each delay device being operable to produce a trigger signal and an output signal at a predetermined time after receiving a trigger signal from the previously connected delay device; control circuitry common to said delay devices for controlling said predetermined time interval; and output circuitry coupled to receive the output signals of the delay devices to produce therefrom said second clock signal.

REFERENCES:
patent: 3631464 (1971-12-01), Dahlberg
patent: 3995119 (1979-11-01), Pachynski, Jr.
patent: 4316148 (1982-02-01), Kaminski
patent: 4613775 (1986-09-01), Dick
patent: 4691124 (1987-09-01), Ledzius et al.
patent: 4899071 (1990-02-01), Morales
I. Hernandez, Jr., "Frequency Multiplier Using Delay Cicuits," IBM Technical Disclosure Bulletin, vol. 26, No. 3A Aug., 1983.
Bult et al., "A CMOS Analog Continuous-Time Delay Line with Adaptive Delay-Time Control", IEEE J. of Solid State Circuits, vol. 23, No. 3, pp. 759-761 (Jun. 1988).

Affiliated with

Also associated with

Rating

Clock generation does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Clock generation, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Clock generation will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-289811