Clock generating method and circuit thereof

Details Clock generating method and circuit thereof Clock generating method and circuit thereof

2008-09-23

2008-09-23

Cox, Cassandra (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Clock or pulse waveform generating

C327S565000

Reexamination Certificate

active

11161131

ABSTRACT:
A clock generating method and circuit are provided. The circuit includes a basic clock unit, a plurality of subclock units, which are connected in parallel or in series, and a plurality of special control units (SCU). The basic clock unit provides a basic clock signal and each of the clock units provides a corresponding clock signal. Each of the special control units are disposed between two adjacent clock units to delay the clock signal generated by the clock unit connected to the output terminal of the special control units.

REFERENCES:
patent: 6570428 (2003-05-01), Liao et al.
patent: 6639443 (2003-10-01), Campbell
patent: 6697416 (2004-02-01), Jennings
patent: 6897699 (2005-05-01), Nguyen et al.
patent: 7003031 (2006-02-01), Sugita
patent: 7106117 (2006-09-01), Jung et al.

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