Clock generating circuit

Details Clock generating circuit Clock generating circuit

2010-01-21

2011-10-04

Lam, Tuan T (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C327S291000, C327S299000

Reexamination Certificate

active

08030977

ABSTRACT:
A main (sub) clock circuit comprising a first (second) capacitor, a first (second) current-supply circuit to supply to the first (second) capacitor a first (third) current for charging at a predetermined-current value or a second (fourth) current for discharging at a predetermined-current value, a first (second) charge/discharge-control circuit to output a first (second) control signal for switching between the first (third) current and second (fourth) current which are supplied to the first (second) capacitor from the first (second) current-supply circuit when a voltage across the first (second) capacitor has reached a first (third) reference voltage or second (fourth) reference voltage higher than the first (third) reference voltage, and a first (second) output circuit to output a main (sub) clock according to the first (second) control signal, the first capacitor having one end connected to a first potential, the second capacitor having one end to which the main clock is input.

REFERENCES:
patent: 3745367 (1973-07-01), Schindler et al.
patent: 5668508 (1997-09-01), Pulvirenti et al.
patent: 6052035 (2000-04-01), Nolan et al.
patent: 6456170 (2002-09-01), Segawa et al.
patent: 6587006 (2003-07-01), Kawajiri et al.
patent: 6850101 (2005-02-01), De Stasi
patent: 7724100 (2010-05-01), Gong et al.
patent: 08-307254 (1996-11-01), None

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