Clock generating circuit

Details Clock generating circuit Clock generating circuit

1997-03-25

1998-11-17

Butler, Dennis M.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Converting, per se, of an ac input to corresponding dc at an...

395556, 327291, G06F 104

Patent

active

058389563

ABSTRACT:
A clock generating circuit which generates a clock signal with a desired frequency. An adder adds a first predetermined value to a previous value stored in flip-flops to create a current value (first value). A subtractor computes the difference between a value obtained by adding a second predetermined value to the first value and a third predetermined value and outputs the resultant difference value as a second value. The first value increases every time a reference clock pulse is input. The resultant values are sent to a memory device via a selector and the flip-flops. When the first value gradually increases and finally exceeds a third predetermined value, the selector selects the second value instead of the first value, where the third predetermined value is set to the maximum address value of the memory device.

REFERENCES:
patent: 5651031 (1997-07-01), Ishizu
patent: 5663945 (1997-09-01), Hayashi et al.

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