Clock generating apparatus, data transmitting/receiving apparatu

Details Clock generating apparatus, data transmitting/receiving apparatu Clock generating apparatus, data transmitting/receiving apparatu

1991-09-30

1995-01-03

Chin, Stephen

Pulse or digital communications

Spread spectrum

Direct sequence

375110, 326 93, 327256, 327295, HO4L 700, H03L 700

Patent

active

053793250

ABSTRACT:
A data transmitting/receiving apparatus comprises a master clock signal and a slave clock signal which differ in phase with each other according to a basic clock signal. Serial data is input according to the produced master clock signal or slave clock signal, a protocol process is applied to the input serial data, and the serial data subjected to the protocol process is output according to the master clock signal or the slave clock signal. A start delimiter detecting signal is generated when a start delimiter indicating the first frame is detected in the input serial data and phases are exchanged between the master clock signal and the slave clock signal when there arises a shift on a bit boundary of the serial data when the start delimiter detecting signal is generated. The serial data is output according to the master clock signal or the slave clock signal having their phases exchanged with each other, thus the serial data is transmitted without delay despite a shift arising on the bit boundary of the serial data.

REFERENCES:
patent: 4521897 (1985-06-01), Merrell
patent: 4694196 (1987-09-01), Hasley et al.
patent: 4926445 (1990-05-01), Robb
patent: 4926451 (1990-05-01), Yoshihara et al.
patent: 5173618 (1992-12-01), Eisenstadt

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