Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1990-11-29
1992-07-21
Callahan, Timothy P.
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
328 63, 328 72, 328155, H03K 700, H03K 1700
Patent
active
051325543
DESCRIPTION:
BRIEF SUMMARY
TECHNICAL FIELD
The present invention relates generally to clock generating apparatii. More specifically, the present invention relates to a clock signal generating apparatus for application in a writing clock generating circuit of a time base corrector or the like for generating a clock signal by synchronizing an externally applied horizontal synchronizing signal with a reference synchronizing signal.
BACKGROUND ART
In recording a video signal on an optical disc or in a video tape recorder in the form of an analog signal and reproducing the same, a time base corrector is used for removing time base fluctuation of the reproduced video signal.
FIG. 1 is a schematic block diagram showing one example of a conventional time base corrector. Referring to FIG. 1, a terminal 26 receives a reproduced video signal (still picture signal) having a time base fluctuated. This reproduced video signal is applied to an A/D convertor 21 and a writing clock generating circuit 24. Writing clock generating circuit 24 separates a horizontal synchronizing signal from the reproduced video signal and also generates a writing clock signal W.multidot.CK corresponding to a time base fluctuation of the reproduced video signal. In response to the writing clock signal W.multidot.CK, A/D converter 21 samples the reproduced video signal and digitalizes the same to be applied to a memory 22. Memory 22 writes the digitalized video signal in response to the writing clock signal W.multidot.CK having the same time base fluctuation.
Meanwhile, an external reference synchronizing signal is applied to a reading clock generating circuit 25, which circuit generates a reading clock signal R.multidot.CK synchronized with the external reference synchronizing signal having a fixed time base, which clock signal is applied to memory 22 and a D/A converter 23. In response to the reading clock signal R.multidot.CK, memory 22 reads the stored digital video signal and applies the same to D/A converter 23. In response to this reading clock signal R.multidot.CK, D/A converter 23 converts the digital video signal to an analog signal. Therefore, the video signal output from D/A converter 23 to an output terminal 27 has a fixed time base.
Time base correcting capability of such a time base corrector as shown in FIG. 1 depends on whether the writing clock signal W.multidot.CK can be generated or not which precisely corresponds to a time base fluctuation of the reproduced video signal. A conventionally proposed common BCO (burst controlled oscillator) using such elements as a crystal oscillator, a coil and a capacitor is not satisfactory and therefore a circuit is required having a wide frequency response range and a high response speed. Such a BCO is essentially liable to become unstable, affected by noise, waveform distortion, drop out or skew.
Thus, various improvements have been made in a burst gate circuit or a synchronization separating circuit included in a time base corrector in order to prevent attenuation of a time base fluctuation component of an input video signal while reducing the effect of noise or the like. For example, used as a horizontal synchronizing signal separating circuit are a delay circuit, a synchronization gate circuit employing a gate signal and a flywheel oscillator, and such a circuit as detecting drop out to mute the drop out noise in a video signal and inhibiting synchronization separating or clamping. A wide-band circuit is used as a color burst gate circuit for amplifying and separating a synchronizing signal and a color burst signal.
FIG. 2 shows one example of a case where a precise reading clock signal R.multidot.CK is generated by using the separated synchronizing signal and color burst signal.
In a writing clock generating circuit 24 shown in FIG. 2, a horizontal synchronizing signal is applied to a phase comparator 31 through a terminal 40. Phase comparator 31 compares the phase of the horizontal synchronizing signal with that of a signal obtained by frequency-dividing an output of a variable voltage controlled oscillato
REFERENCES:
patent: 4653075 (1987-03-01), Wisniewski
patent: 4780891 (1988-10-01), Guerin et al.
patent: 4799240 (1989-01-01), Yoshida
patent: 4891598 (1990-01-01), Yoshida et al.
Hiramatsu Yonejirou
Satou Shun-ichi
Callahan Timothy P.
Sharp Kabushiki Kaisha
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