Clock gater circuit and associated method

Details Clock gater circuit and associated method Clock gater circuit and associated method

2006-10-03

2006-10-03

Callahan, Timothy P. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Rectangular or pulse waveform amplitude control

C327S365000

Reexamination Certificate

active

07116150

ABSTRACT:
One embodiment is a clock gater circuit comprising an inverter block for driving an output clock signal responsive at least in part to an input clock signal that is selectively driven via a clock generator circuit to an input node of the inverter block responsive to a qualifier signal. Also included is circuitry for restoring a logic level at the input node of the inverter block to a particular value, the circuitry operating responsive to the qualifier signal.

REFERENCES:
patent: 5661751 (1997-08-01), Johnson
patent: 5726596 (1998-03-01), Perez
patent: 5760610 (1998-06-01), Naffziger
patent: 5901061 (1999-05-01), Gaddis et al.
patent: 5925133 (1999-07-01), Buxton et al.
patent: 6137331 (2000-10-01), Peset Llopis
patent: 6194938 (2001-02-01), Waldrop
patent: 6232820 (2001-05-01), Long et al.
patent: 6281710 (2001-08-01), Poirier et al.
patent: 6310499 (2001-10-01), Radjassamy
patent: 6331800 (2001-12-01), Radjassamy
patent: 6407602 (2002-06-01), Radjassamy
patent: 6429698 (2002-08-01), Young
patent: 6459318 (2002-10-01), Brauch

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