Clock frequency divider circuit

Details Clock frequency divider circuit Clock frequency divider circuit

1985-12-18

1987-04-07

Heyman, John S.

Electrical pulse counters, pulse dividers, or shift registers: c

Systems

Pulse multiplication or division

377111, 377114, 307269, 307271, 328 61, 375118, 375121, H03K 2102, H03K 2110, H03K 5156

Patent

active

046566490

ABSTRACT:
A clock frequency divider circuit for producing signals of a desired frequency (of, for example, 1.024 MHz) in response selectively to input clock pulses of two or more different predetermined frequencies, wherein control pulses are produced from and in synchronism with the input clock pulses and are fed to a frequency division network including two master-slave "D" flip-flop circuits adapted to produce a first predetermined fraction of the frequency of the control pulses in response to input clock pulses of a first frequency (of, for example, 2.048 MHz conforming to CCITT Recommendation standard) or a second predetermined fraction of the frequency of the control pulses in response to input clock pulses of a second or third frequency (of, for example, 1.536 MHz or 1.544 MHz conforming to T-1 standards). Signals with a frequency corresponding to such a first or second predetermined fraction are fed to a frequency selector network in which the frequency fraction is multiplied by a first or second predetermined multiple to achieve the desired frequency.

REFERENCES:
patent: 3976946 (1976-08-01), Schroder
patent: 4231104 (1980-10-01), St. Clair
patent: 4348640 (1982-09-01), Clendening
patent: 4406014 (1983-09-01), Doron
patent: 4408333 (1983-10-01), Fujii

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