Clock frequency divider and trigger signal generation...

Details Clock frequency divider and trigger signal generation... Clock frequency divider and trigger signal generation...

2007-03-06

2007-03-06

Nguyen, Linh My (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Frequency or repetition rate conversion or control

C327S115000

Reexamination Certificate

active

11060477

ABSTRACT:
A clock frequency divider is provided which has first through Pth (where P is an integer) sub-counters, each capable of counting M+1 clock pulses and provided in parallel, and first through Pth clock signals are provided to the sub-counters, which has same period as a reference clock signal and are sequentially shifted by 1/P of the period of the reference clock signal. Of the first through Pth sub-counters, when the Nth sub-counter (where N is an arbitrary number from 1 to P) finishes counting a prescribed number M of reference clock pulses, all the other sub-counters are initialized, or, at least the (N+1)th sub-counter is initialized.

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