Clock formation circuit with phase locked loop control

Details Clock formation circuit with phase locked loop control Clock formation circuit with phase locked loop control

1989-09-28

1991-10-15

Callahan, Timothy P.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307262, 328155, 331 1A, 331 17, H03K 500, H03K 513

Patent

active

050577050

ABSTRACT:
A clock formation circuit to form, from a digital signal, a formation clock signal corresponding to a data clock controlling an inversion timing of the digital signal and providing an information signal of the phase difference between the digital signal and the formation clock signal and also providing a formation clock signal having a frequency controlled so as to be coincidental with a data clock frequency of the digital data signal and a phase not offset from that of the digital data signal.

REFERENCES:
patent: 3913029 (1975-10-01), Caspari et al.
patent: 3946329 (1976-03-01), Caspari et al.
patent: 4443769 (1984-04-01), Aschwanden et al.
patent: 4649353 (1987-03-01), Sonnenberg
patent: 4818950 (1989-04-01), Ranger
patent: 4890072 (1989-12-01), Espe et al.

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