Clock extraction circuit

Oscillators – Automatic frequency stabilization using a phase or frequency... – With reference oscillator or source

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Details

331 11, 375359, 375360, 327156, 327159, H03L 706, H04L 702

Patent

active

06072370&

ABSTRACT:
A high operational speed clock extraction circuit, which can be manufactured to be compact at low cost. In order to reduce the operational speed of a phase comparator, phases are compared between a signal obtained by frequency-dividing an inputted non-return zero signal by m and a signal obtained by frequency-dividing an extracted clock signal outputted from a voltage control oscillator by n. In addition, in order to correctly compare phases between the frequency-divided signals, edge pulses used for phase comparison and produced based on the frequency-divided input signals are divided by an edge pulse selecting circuit according to cases, specifically between a case of performing phase comparison for the rising edge of a frequency-divided clock and a case of performing phase comparison for the falling edge of the same. Then, phase comparison is performed based on each of the edge pulses. The output of each phase comparison is passed through a low pass filter to control the voltage control oscillator.

REFERENCES:
patent: 3452294 (1969-06-01), Mumford et al.

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