Clock extracting circuit and clock extracting method

Details Clock extracting circuit and clock extracting method Clock extracting circuit and clock extracting method

2008-01-22

2008-01-22

Tse, Young T. (Department: 2611)

Pulse or digital communications

Synchronizers

Synchronizing the sampling time of digital data

C375S360000

Reexamination Certificate

active

07321647

ABSTRACT:
In a clock extracting circuit according to the present invention, after serial data is subjected to oversampling using a reference clock of 2N times a frequency of the serial data, clock timing in a period of time in which signal level remains unchanged for a long duration is extracted. Clock timing based on a point of change in the signal level is also extracted, and a final clock timing signal is outputted according to these timings detected. Thus, clock timing can be extracted accurately without omission even when the input signal includes jitter. Further, the clock extraction is performed without converting the input signal into parallel data and by simple processing. A clock extracting circuit for extracting a clock signal from the received serial data with high accuracy is thus realized without increasing the circuit scale.

REFERENCES:
patent: 5504751 (1996-04-01), Ledzius et al.
patent: 7133482 (2006-11-01), Poletto et al.
patent: 2001-148692 (2001-05-01), None

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