Clock enable system

Details Clock enable system Clock enable system

2005-09-27

2005-09-27

Urban, Edward F. (Department: 2685)

Telecommunications

Transmitter and receiver at same station

Radiotelephone equipment detail

C455S574000, C327S291000, C327S144000

Reexamination Certificate

active

06950672

ABSTRACT:
A clock enable system for a multichip device includes a first integrated circuit including a clock signal and at least a second integrated circuit including at least one functional block periodically requiring clock signals from the first integrated circuit; a clock required circuit responsive to each functional block for providing a clock required signal in response to activation of any one or more of the functional blocks; and a clock enable circuit responsive to the clock required signal for enabling the first integrated circuit to provide clock signals to the functional blocks on the second integrated circuit.

REFERENCES:
patent: 5058203 (1991-10-01), Inagami
patent: 5485127 (1996-01-01), Bertoluzzi et al.
patent: 5675808 (1997-10-01), Gulick et al.
patent: 5677849 (1997-10-01), Smith
patent: 5950120 (1999-09-01), Gardner et al.
patent: 6125451 (2000-09-01), Fukunaga
patent: 6442407 (2002-08-01), Bauer et al.
patent: 6564329 (2003-05-01), Cheung et al.
patent: 2003/0014682 (2003-01-01), Schmidt

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