Clock enable buffer for entry of self-refresh mode

Details Clock enable buffer for entry of self-refresh mode Clock enable buffer for entry of self-refresh mode

2006-11-28

2006-11-28

Nguyen, Long (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific signal discriminating without subsequent control

By amplitude

C327S056000

Reexamination Certificate

active

07142022

ABSTRACT:
A clock enable buffer for entry of a self-refresh mode. The clock enable buffer includes a current mirror load connected between a voltage source and first and second nodes, wherein the current mirror load has first and second transistors; a third transistor connected between the first node and a third node, wherein the third transistor is turned on according to a reference voltage; a fourth transistor connected between the second node and the third node, for controlling the current mirror load in response to a clock enable signal; a fifth transistor connected between the third node and a ground, wherein the fifth transistor is turned on according to a self-refresh signal; and a sixth transistor that is turned on according to an inverted self-refresh signal to make the potential of the first node a Low level.

REFERENCES:
patent: 5305272 (1994-04-01), Matsuo et al.
patent: 5789948 (1998-08-01), Kim et al.
patent: 5801554 (1998-09-01), Momma et al.
patent: 6184744 (2001-02-01), Morishita
patent: 9-294062 (1997-11-01), None

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