Clock driver circuit and semiconductor integrated circuit device

Details Clock driver circuit and semiconductor integrated circuit device Clock driver circuit and semiconductor integrated circuit device

1997-09-11

1999-11-02

Wells, Kenneth B.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Clock or pulse waveform generating

327296, 327297, G06F 104

Patent

active

059778105

ABSTRACT:
A clock driver circuit includes a first and a second clock driver 15a and 15b. In each of these clock drivers, a plurality of main drivers 19(1) through 19(n) have their input nodes and output nodes connected respectively to a first and a second common line 18 and 21. The second common line 21 is connected to a plurality of clock signal supply lines 20(1) through 20(m) which in turn are connected to the clock input nodes of second macro cells 16 each requiring a clock signal. In a test mode, the clock signal supply lines 20a(1) through 20a(m) of the first clock driver 15a are connected respectively to the clock signal supply lines 20b(1) through 20b(m) of the second clock driver 15b by connection means 22. Thus, a clock driver circuit is provided which offers high driving ability with negligible clock skews in both normal mode and test mode.

REFERENCES:
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patent: 5327018 (1994-07-01), Karlish et al.
patent: 5355004 (1994-10-01), Saitoh
patent: 5444276 (1995-08-01), Yokota et al.
patent: 5497109 (1996-03-01), Honda et al.
patent: 5578938 (1996-11-01), Kazami
patent: 5619048 (1997-04-01), Yokota et al.

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