Clock driver

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Having specific delay in producing output waveform

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Details

327272, 327283, 327285, H03K 1730

Patent

active

058960546

ABSTRACT:
A clock driver circuit (100) comprises an input (102) for a reference clock signal. A filter (106) is connected to the input to receive the reference signal and output a filtered signal. A complementary FET driver circuit (108) having a cross-over threshold is coupled to the filter to receive the filtered signal and output a conditioned clock signal.

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patent: 4849654 (1989-07-01), Okada
patent: 5041741 (1991-08-01), Steele
patent: 5055706 (1991-10-01), Nakai et al.
patent: 5120996 (1992-06-01), Mead et al.
patent: 5164621 (1992-11-01), Miyamoto
patent: 5214316 (1993-05-01), Nagai
patent: 5382840 (1995-01-01), Massoner
patent: 5532969 (1996-07-01), Houghton et al.
patent: 5623218 (1997-04-01), Kim

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