Clock disturbance detection based on ratio of main clock and sub

Details Clock disturbance detection based on ratio of main clock and sub Clock disturbance detection based on ratio of main clock and sub

1996-01-29

1998-11-03

Chin, Stephen

Pulse or digital communications

Multilevel

Bipolar signal

341 56, H04L 2534

Patent

active

058320334

ABSTRACT:
A bipolar-clock monitor circuit includes a first shift register shifting positive-polarity pulse signal according to the negative-polarity pulse signal to produce a i-bit-shift signal and a j-bit-shift signal. The integers i and j are determined based on the period ratio of a main clock and a subclock included in the bipolar clock signal so that the i-bit-shift signal is identical with the j-bit-shift signal when the bipolar clock signal is normal. The non-coincidence determination circuit checks whether the i-bit-shift signal coincides with the j-bit-shift signal and produces a disturbance detection signal when the i-bit-shift signal does not coincide with the j-bit-shift signal.

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patent: 4887083 (1989-12-01), Kosugi et al.
patent: 5109391 (1992-04-01), Kurobe

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