Clock distribution system for synchronous circuit assemblies

Details Clock distribution system for synchronous circuit assemblies Clock distribution system for synchronous circuit assemblies

1993-12-07

2000-10-10

Hardy, David

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

257690, 257691, 307480, 3073031, H01L 2302, H01L 2348, H01L 2352

Patent

active

061304751

ABSTRACT:
A packaging assembly for semiconductor memory modules using synchronous clocking signals distributed to each module within a package. The clock distribution network on the assembly is characterized by including a transmission line termination means, preferably a resistor, coupled immediately adjacent to one of the assembly input pins.

REFERENCES:
patent: 4639615 (1987-01-01), Lee et al.
patent: 5216278 (1993-06-01), Lin et al.
International Business Machines Corporation Technical Disclosure Bulletin vol. 32 No. 10A Mar. 1990 Title: Termination Circuitry For Multiple Differential Clock Copies pp. 371-372.
"Basic Engineering Circuit Analysis", pp. 332-333; David Irwin.
"Webster's II New Riverside Inversity Dictionary"; pp. 613 & 978.

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