Clock distribution system

Pulse or digital communications – Spread spectrum – Direct sequence

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328 63, 375 36, H04L 700

Patent

active

052746771

ABSTRACT:
A clock distribution system includes a clock generation and distribution part for generating a clock signal and distributing the generated clock signal to a plurality of destinations, slots in each of which a clock reception unit can be detachably mounted, and a plurality of transmission lines coupling the clock generation and distribution part to the slots. Each slot includes a circuit for generating a mount state signal which indicates whether or not the slot is mounted with a clock reception unit, and for supplying the mount state signal to the clock generation and distribution part via a transmission line. This mount state signal has a first state when no clock receiving unit is mounted in the slot and has a second state when a clock receiving unit is mounted in the slot. The clock generation and distribution part includes a circuit for receiving the mount state signal from each slot and for transmitting via the transmission line the clock signal to each slot from which a mount state signal having the second state is received.

REFERENCES:
patent: 4839604 (1989-06-01), Tanahashi
Patent Abstracts of Japan, vol. 12, No. 125 (P-691) (2972), Apr. 19, 1988 Japanese Patent Publication 62-249259, Oct. 30, 1987, Yasunobu Iwata, "Computer System".
Patent Abstracts of Japan, vol. 9, No. 299 (P-408), Nov. 27, 1985, Japanese Patent Publication 60-134924, Jul. 18, 1985, Kishino Takumi et al., "Option Unit Connection System".
IBM Technical Disclosure Bulletin, vol. 32, No. 10A, Mar. 1990, Armonk, N.Y., "Termination Circuitry for Multiple Differential Clock Copies" pp. 371-372.

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