Clock distribution network

Details Clock distribution network Clock distribution network

1995-08-18

1996-10-15

Mis, David

Oscillators

Automatic frequency stabilization using a phase or frequency...

Plural oscillators controlled

331 16, 331 18, 331 55, 327147, 327153, 327295, 327297, H03L 707, H03L 718, H03K 300, H03K 513

Patent

active

055658164

ABSTRACT:
A clock distribution network for synchronously coupled electronic communication systems that includes a clock distribution device having a phase locked loop for synchronizing the external clock signals provided to each semiconductive device with each other. The clock distribution device distributes a low speed clock to a large number of clocked semiconductor devices where those devices then internally generate high speed clocks in phase with the low speed clock. The low speed clocks are phase shifted with respect to each other to reduce radiated energy. The ratio of internal to external clock speed is also communicated to each chip so that the chips can be programmed to operate with a variety of external clock speeds. The phase shifting of the external clock to different chips is provided so that the chips can still communicate synchronously at the high speed internal clock.

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