Clock distribution circuit

Details Clock distribution circuit Clock distribution circuit

2008-07-08

2008-07-08

Cox, Cassandra (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Clock or pulse waveform generating

C327S563000

Reexamination Certificate

active

07397293

ABSTRACT:
A clock distribution circuit for suitably generating, transmitting, and receiving clock signals used in circuits that are configured with the same circuit topology is provided. The clock distribution circuit has a transmission buffer circuit that transmits a clock signal and an amplitude amplification buffer circuit that amplifies the amplitude of cross-coupling connections inserted in parallel with the transmission buffer circuit on a transmission path for the clock signal. Wherein the number of transistors having the same conductivity type as the transistors of a differing conductivity type of the transmission buffer circuit and that of the transistors of a differing conductivity type of the amplitude amplification buffer circuit are the same. At least one transistor is provided as a bias adjustment transistor for adjusting bias in each of the transmission buffer circuit and the amplitude amplification buffer circuit, respectively, and bias adjustments are made simultaneously.

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patent: 2005/0035789 (2005-02-01), Tamura et al.
patent: 07-161185 (1995-06-01), None
patent: 3265181 (2001-12-01), None
patent: 2004-317910 (2004-11-01), None

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